电子工程专辑

异步FIFO的FPGA实现

本文大部分内容来自Clifford E. Cummings的《Simulation and Synthesis Techniques for Asynchronous FIFO Design》，同时加上一些自己的一些理解。 FIFO简介 FIFO是英文First In First Out 的缩写，是一种先进先出的数据缓存器，它与普通存储器的区别是没有外部读写地址线，这样使用起来 ...
EDN

Building an FPGA FIFO without using logic resources

Today, FPGA designers are using these flexible devices to perform everything from simple glue logic tasks to implementing complicated system on a chip (SoC) functions. The efficiency and ease of ...
Design-Reuse

Design Transition from Sync to Async: Design and Verification Challenges

Synchronous interfaces involve a single clock domain and are relatively easy to design. However, at times, it is advantageous and necessary to have an asynchronous interface between peripherals for ...
EDN

FIFO, handshake synchronizers a challenge for CDC analysis

Among the many verification challenges confronting system-on-chip designers these days, clock domain crossings (CDCs) rank near the top in difficulty. Two particularly troublesome CDC-related issues ...